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| author |   Daniel Machon <daniel.machon@microchip.com> | 2024-09-16 11:49:21 +0200 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2024-10-13 19:20:23 +0300 |
| commit | 118c000211fbc476726a08f810ce9df700bf2bb3 (patch) | |
| tree | 9847bff4d5705648ad7b88570417805b0321daf9 /scripts/gdb/linux/modules.py | |
| parent | clk: lan966x: make clk_names const char * const (diff) | |
| download | wireguard-linux-118c000211fbc476726a08f810ce9df700bf2bb3.tar.xz wireguard-linux-118c000211fbc476726a08f810ce9df700bf2bb3.zip | |
clk: lan966x: prepare driver for lan969x support
In preparation for lan969x support, add private match data for lan966x
and add variables for: peripheral clock names, clock gate names, number
of total clocks and number of generic clocks. Use the variables
throughout.
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://lore.kernel.org/r/20240916-lan969x-clock-v1-3-0e150336074d@microchip.com
[claudiu.beznea: in lan966x_clk_probe(): keep struct_size() arguments on
a single line]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions