diff options
| author |   Stephen Boyd <sboyd@kernel.org> | 2024-10-18 15:10:53 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-10-18 15:10:53 -0700 |
| commit | 31ba299387f32b6994c7a87a79ceef83d411c0ab (patch) | |
| tree | 6a6a8306bd2893e97eb9dee02717037c77e39233 /scripts/gdb/linux/modules.py | |
| parent | Linux 6.12-rc1 (diff) | |
| parent | clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks (diff) | |
| download | wireguard-linux-31ba299387f32b6994c7a87a79ceef83d411c0ab.tar.xz wireguard-linux-31ba299387f32b6994c7a87a79ceef83d411c0ab.zip | |
Merge tag 'renesas-clk-for-v6.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock
and reset on Renesas RZ/V2H(P)
* tag 'renesas-clk-for-v6.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks
clk: renesas: r9a09g057: Add clock and reset entries for ICU
clk: renesas: r9a09g057: Add CA55 core clocks
clk: renesas: Remove duplicate and trailing empty lines
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions