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author | 2024-08-01 11:18:01 +0100 | |
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committer | 2024-08-01 16:11:26 +0100 | |
commit | 58d245e03c324d083a0ec3b9ab8ebd46ec9848d7 (patch) | |
tree | fe97a32415342276b580444c7295959b43dc1165 /scripts/gdb/linux/modules.py | |
parent | Linux 6.11-rc1 (diff) | |
download | wireguard-linux-58d245e03c324d083a0ec3b9ab8ebd46ec9848d7.tar.xz wireguard-linux-58d245e03c324d083a0ec3b9ab8ebd46ec9848d7.zip |
arm64: cputype: Add Cortex-X1C definitions
Add cputype definitions for Cortex-X1C. These will be used for errata
detection in subsequent patches.
These values can be found in the Cortex-X1C TRM:
https://developer.arm.com/documentation/101968/0002/
... in section B2.107 ("MIDR_EL1, Main ID Register, EL1").
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20240801101803.1982459-2-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
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