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| author |   Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> | 2024-10-23 10:21:08 +0000 |
|---|---|---|
| committer |   Mario Limonciello <mario.limonciello@amd.com> | 2024-10-28 14:54:36 -0500 |
| commit | 73070a9169b16e08b191066e513bce6c237c9221 (patch) | |
| tree | fb8812245ba83253e2d3a4271a1125278ad8a608 /scripts/gdb/linux/modules.py | |
| parent | cpufreq/amd-pstate: Rename functions that enable CPPC (diff) | |
| download | wireguard-linux-73070a9169b16e08b191066e513bce6c237c9221.tar.xz wireguard-linux-73070a9169b16e08b191066e513bce6c237c9221.zip | |
cpufreq/amd-pstate: Do not attempt to clear MSR_AMD_CPPC_ENABLE
MSR_AMD_CPPC_ENABLE is a write once register, i.e. attempting to clear
it is futile, it will not take effect. Hence, return if disable (0)
argument is passed to the msr_cppc_enable()
Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Link: https://lore.kernel.org/r/20241023102108.5980-3-Dhananjay.Ugwekar@amd.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions