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| author |   Chang S. Bae <chang.seok.bae@intel.com> | 2024-11-06 10:23:13 -0800 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2024-11-12 21:42:29 +0100 |
| commit | b35ea78a4761b08b2695d98f240fec1f4e85092b (patch) | |
| tree | f67254e3e9873bd0d84547072637744192db0a41 /scripts/gdb/linux/modules.py | |
| parent | sched/cpufreq: Ensure sd is rebuilt for EAS check (diff) | |
| download | wireguard-linux-b35ea78a4761b08b2695d98f240fec1f4e85092b.tar.xz wireguard-linux-b35ea78a4761b08b2695d98f240fec1f4e85092b.zip | |
cpufreq: ACPI: Simplify MSR read on the boot CPU
Replace the 32-bit MSR access function with a 64-bit variant to simplify
the call site, eliminating unnecessary 32-bit value manipulations.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Link: https://patch.msgid.link/20241106182313.165297-1-chang.seok.bae@intel.com
[ rjw: Subject edit ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions