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author | 2024-11-06 14:37:32 -0800 | |
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committer | 2024-11-06 14:37:32 -0800 | |
commit | ea1ba200488107a2c9bbdfc80a2cb74ed8f081bc (patch) | |
tree | b148e9dd365f0ab86b2271655f6cdfb199a21b28 /scripts/gdb/linux/modules.py | |
parent | Linux 6.12-rc1 (diff) | |
parent | clk: sunxi-ng: Use of_property_present() for non-boolean properties (diff) | |
download | wireguard-linux-ea1ba200488107a2c9bbdfc80a2cb74ed8f081bc.tar.xz wireguard-linux-ea1ba200488107a2c9bbdfc80a2cb74ed8f081bc.zip |
Merge tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Chen-Yu Tsai:
- Add sigma-delta modulation settings for audio PLL on the H616 SoC,
crucial for accurate audio reproduction
- Constify |struct ccu_reset_map| throughout the sunxi-ng clk drivers
- Fix the audio PLL divider preset on the D1 SoC
- Switch to of_property_present() for checking DT property presence
* tag 'sunxi-clk-for-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: Use of_property_present() for non-boolean properties
clk: sunxi-ng: d1: Fix PLL_AUDIO0 preset
clk: sunxi-ng: Constify struct ccu_reset_map
clk: sunxi-ng: h616: Add sigma-delta modulation settings for audio PLL
Diffstat (limited to 'scripts/gdb/linux/modules.py')
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