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| author |   Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> | 2015-02-25 18:31:50 -0800 |
|---|---|---|
| committer |   Zhang Rui <rui.zhang@intel.com> | 2015-02-28 13:58:36 +0800 |
| commit | f126079123f9d055c2304b8ab17bac11b0cd22fa (patch) | |
| tree | 20e567a6a8a9c55fd0f14275e8254c5edd9cff12 /scripts/gdb/linux/modules.py | |
| parent | thermal/intel_powerclamp: add id for Avoton SoC (diff) | |
| download | wireguard-linux-f126079123f9d055c2304b8ab17bac11b0cd22fa.tar.xz wireguard-linux-f126079123f9d055c2304b8ab17bac11b0cd22fa.zip | |
thermal: int340x_thermal: Ignore missing _ART, _TRT tables
It is possible that _ART/_TRT tables are missing or have errors.
Ignore those failures, as INT3400 thermal zone is still required
for _OSC or mode switch.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions