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| author |   Jerome Brunet <jbrunet@baylibre.com> | 2024-10-08 09:48:29 +0200 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2024-10-14 10:11:05 +0200 |
| commit | 664988eb47dd2d6ae1d9e4188ec91832562f8f26 (patch) | |
| tree | 0a7285a7162c5d23351cf33f3eaba1d6e867f30a /scripts/gdb/linux/proc.py | |
| parent | Merge tag 'reset-amlogic-aux' into clk-meson-next (diff) | |
| download | wireguard-linux-664988eb47dd2d6ae1d9e4188ec91832562f8f26.tar.xz wireguard-linux-664988eb47dd2d6ae1d9e4188ec91832562f8f26.zip | |
clk: amlogic: axg-audio: use the auxiliary reset driver
Remove the implementation of the reset driver in axg audio
clock driver and migrate to the one provided by the reset framework
on the auxiliary bus
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241008-meson-clk-rst-aux-v2-1-682ab9151f4f@baylibre.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'scripts/gdb/linux/proc.py')
0 files changed, 0 insertions, 0 deletions