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| author |   Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> | 2024-11-10 09:33:40 -0800 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2024-11-11 12:03:26 -0600 |
| commit | 1af75b2ad08bd5977c51c2d0fc11741a4c0a48d9 (patch) | |
| tree | 4cfb229050ef8e39b0691640bf052ff82a296f72 /scripts/gdb/linux/tasks.py | |
| parent | soc: qcom: socinfo: add IPQ5424/IPQ5404 SoC ID (diff) | |
| download | wireguard-linux-1af75b2ad08bd5977c51c2d0fc11741a4c0a48d9.tar.xz wireguard-linux-1af75b2ad08bd5977c51c2d0fc11741a4c0a48d9.zip | |
firmware: qcom: scm: Introduce CP_SMMU_APERTURE_ID
The QCOM_SCM_SVC_MP service provides QCOM_SCM_MP_CP_SMMU_APERTURE_ID,
which is used to trigger the mapping of register banks into the SMMU
context for per-processes page tables to function (in case this isn't
statically setup by firmware).
This is necessary on e.g. QCS6490 Rb3Gen2, in order to avoid "CP | AHB
bus error"-errors from the GPU.
Introduce a function to allow the msm driver to invoke this call.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Link: https://lore.kernel.org/r/20241110-adreno-smmu-aparture-v2-1-9b1fb2ee41d4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/tasks.py')
0 files changed, 0 insertions, 0 deletions