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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2022-01-13 09:57:46 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-01-13 09:57:46 -0600 |
| commit | 3164f27b5fd692ef6e0a5464b31534d09cc73949 (patch) | |
| tree | 97e66fde40cfa86ac8ff1d3952ff1384639072cc /scripts/gdb/linux/utils.py | |
| parent | Merge branch 'remotes/lorenzo/pci/aardvark' (diff) | |
| parent | PCI: apple: Fix REFCLK1 enable/poll logic (diff) | |
| download | wireguard-linux-3164f27b5fd692ef6e0a5464b31534d09cc73949.tar.xz wireguard-linux-3164f27b5fd692ef6e0a5464b31534d09cc73949.zip | |
Merge branch 'remotes/lorenzo/pci/apple'
- Enable clock gating to save power (Hector Martin)
- Fix REFCLK1 enable/poll logic (Hector Martin)
* remotes/lorenzo/pci/apple:
PCI: apple: Fix REFCLK1 enable/poll logic
PCI: apple: Enable clock gating
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions