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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-11-22 16:54:07 +0100 |
|---|---|---|
| committer |   Marc Zyngier <maz@kernel.org> | 2021-11-25 16:55:40 +0000 |
| commit | 357a9c4b79f4c8bbceb77c64ea09d8da3a6a870d (patch) | |
| tree | 734a86589b2f63649045df6720f872f49164f756 /scripts/gdb/linux/utils.py | |
| parent | irqchip/aspeed-scu: Replace update_bits with write_bits. (diff) | |
| download | wireguard-linux-357a9c4b79f4c8bbceb77c64ea09d8da3a6a870d.tar.xz wireguard-linux-357a9c4b79f4c8bbceb77c64ea09d8da3a6a870d.zip | |
irqchip/mips-gic: Use bitfield helpers
Use the FIELD_GET() helper, instead of open-coding the same operation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/74f9d126961a90d3e311b92a54870eaac5b3ae57.1637593297.git.geert+renesas@glider.be
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions