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| author |   Tom St Denis <tom.stdenis@amd.com> | 2022-01-07 06:57:41 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-01-11 15:44:26 -0500 |
| commit | 4cc9f86f851847e5ebfb56212d81f1a30b9d392b (patch) | |
| tree | c0720d355285113d3d595260af8807bc3d834cc2 /scripts/gdb/linux/utils.py | |
| parent | drm/amdgpu: recover gart table at resume (diff) | |
| download | wireguard-linux-4cc9f86f851847e5ebfb56212d81f1a30b9d392b.tar.xz wireguard-linux-4cc9f86f851847e5ebfb56212d81f1a30b9d392b.zip | |
drm/amd/amdgpu: Add pcie indirect support to amdgpu_mm_wreg_mmio_rlc()
The function amdgpu_mm_wreg_mmio_rlc() is used by debugfs to write to
MMIO registers. It didn't support registers beyond the BAR mapped MMIO
space. This adds pcie indirect write support.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions