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| author |   Arnd Bergmann <arnd@arndb.de> | 2019-09-12 12:04:24 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2019-09-12 12:04:24 +0200 |
| commit | 4e53a92cdd1297b6a9b9712004de51936f986914 (patch) | |
| tree | ee17b487e81c16aa87eec62fe875085ca9c413ad /scripts/gdb/linux/utils.py | |
| parent | Linus 5.3-rc1 (diff) | |
| parent | clk: Add support for AST2600 SoC (diff) | |
| download | wireguard-linux-4e53a92cdd1297b6a9b9712004de51936f986914.tar.xz wireguard-linux-4e53a92cdd1297b6a9b9712004de51936f986914.zip | |
Merge branch 'clk/aspeed' into aspeed/dts
The clk/aspeed branch gets merged through the clk
maintainers, pulling it in as a prerequisite for
the aspeed G6 DT files.
* clk/aspeed:
clk: Add support for AST2600 SoC
clk: aspeed: Move structures to header
clk: aspeed: Add SDIO gate
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions