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| author |   Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2019-04-08 16:04:38 +0300 |
|---|---|---|
| committer |   Vineet Gupta <vgupta@synopsys.com> | 2019-04-08 08:41:44 -0700 |
| commit | 55c0c4c793b538fb438bcc72481b9dc2f79fe5a9 (patch) | |
| tree | 0254b9a6441004e66c3177aafb739e49bf1e157b /scripts/gdb/linux/utils.py | |
| parent | ARC: [hsdk] Make it easier to add PAE40 region to DTB (diff) | |
| download | wireguard-linux-55c0c4c793b538fb438bcc72481b9dc2f79fe5a9.tar.xz wireguard-linux-55c0c4c793b538fb438bcc72481b9dc2f79fe5a9.zip | |
ARC: memset: fix build with L1_CACHE_SHIFT != 6
In case of 'L1_CACHE_SHIFT != 6' we define dummy assembly macroses
PREALLOC_INSTR and PREFETCHW_INSTR without arguments. However
we pass arguments to them in code which cause build errors.
Fix that.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: <stable@vger.kernel.org> [5.0]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions