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| author |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2024-06-19 10:53:21 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2024-07-08 12:07:51 -0700 |
| commit | 6681afbb9cce51d49769a714a4efaffcaf3c9a1e (patch) | |
| tree | 17272e39f874451150fe1b7fa543f0a084e1e7a2 /scripts/gdb/linux/utils.py | |
| parent | clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module (diff) | |
| download | wireguard-linux-6681afbb9cce51d49769a714a4efaffcaf3c9a1e.tar.xz wireguard-linux-6681afbb9cce51d49769a714a4efaffcaf3c9a1e.zip | |
dt-bindings: clock: mediatek: Document reset cells for MT8188 sys
The MT8188 sys clocks embed a reset controller: add #reset-cells
to the binding to allow using resets.
Fixes: 1086a5310f9c ("dt-bindings: clock: mediatek: Add new MT8188 clock")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240619085322.66716-2-angelogioacchino.delregno@collabora.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions