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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2022-04-26 09:01:18 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-05-01 19:55:08 -0700 |
| commit | a255ee29252066d621df5d6b420bf534c6ba5bc0 (patch) | |
| tree | 93ea0982efc2581ea6dcb848d7822e665bd2eb0f /scripts/gdb/linux/utils.py | |
| parent | xtensa: enable ARCH_HAS_DEBUG_VM_PGTABLE (diff) | |
| download | wireguard-linux-a255ee29252066d621df5d6b420bf534c6ba5bc0.tar.xz wireguard-linux-a255ee29252066d621df5d6b420bf534c6ba5bc0.zip | |
irqchip: irq-xtensa-mx: fix initial IRQ affinity
When irq-xtensa-mx chip is used in non-SMP configuration its
irq_set_affinity callback is not called leaving IRQ affinity set empty.
As a result IRQ delivery does not work in that configuration.
Initialize IRQ affinity of the xtensa MX interrupt distributor to CPU 0
for all external IRQ lines.
Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions