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| author |   Finley Xiao <finley.xiao@rock-chips.com> | 2019-09-03 19:59:47 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2019-09-05 12:43:39 +0200 |
| commit | ac68dfd3c4836bb2636fd37f3e075ed218afdb2b (patch) | |
| tree | 5208475a94d1a1c0d162cda30aef9fcc3ff88db9 /scripts/gdb/linux/utils.py | |
| parent | clk: rockchip: Add dt-binding header for rk3308 (diff) | |
| download | wireguard-linux-ac68dfd3c4836bb2636fd37f3e075ed218afdb2b.tar.xz wireguard-linux-ac68dfd3c4836bb2636fd37f3e075ed218afdb2b.zip | |
clk: rockchip: Add clock controller for the rk3308
Add the clock tree definition for the new RK3308 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions