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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2019-11-25 12:59:13 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2022-05-01 19:51:23 -0700 |
| commit | dedfe2590bdf1beaaf064f1f1b71098b5fddbfe1 (patch) | |
| tree | d689f083efe63f78745e6ca21cf54b53a9a27310 /scripts/gdb/linux/utils.py | |
| parent | xtensa: handle coprocessor exceptions in kernel mode (diff) | |
| download | wireguard-linux-dedfe2590bdf1beaaf064f1f1b71098b5fddbfe1.tar.xz wireguard-linux-dedfe2590bdf1beaaf064f1f1b71098b5fddbfe1.zip | |
xtensa: add xtensa_xsr macro
xtensa_xsr does the XSR instruction for the specified special register.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions