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| author |   Alexandre Courbot <acourbot@nvidia.com> | 2025-05-07 22:52:33 +0900 |
|---|---|---|
| committer |   Danilo Krummrich <dakr@kernel.org> | 2025-05-13 15:08:57 +0200 |
| commit | e4bc82af9e8b095c0f7a5aa9050b780002bd0933 (patch) | |
| tree | f8718dc38ead92630518176713e339474773e1f5 /scripts/gdb/linux/utils.py | |
| parent | gpu: nova-core: define registers layout using helper macro (diff) | |
| download | wireguard-linux-e4bc82af9e8b095c0f7a5aa9050b780002bd0933.tar.xz wireguard-linux-e4bc82af9e8b095c0f7a5aa9050b780002bd0933.zip | |
gpu: nova-core: fix layout of NV_PMC_BOOT_0
The layout of NV_PMC_BOOT_0 has two small issues:
- The "chipset" field, while useful to identify a chip, is actually an
aggregate of two distinct fields named "architecture" and
"implementation".
- The "architecture" field is split, with its MSB being at a different
location than the rest of its bits.
Redefine the register layout to match its actual definition as provided
by OpenRM and expose the fully-constructed "architecture" field through
our own "Architecture" type. The "chipset" pseudo-field is also useful
to have, so keep providing it.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Link: https://lore.kernel.org/r/20250507-nova-frts-v3-6-fcb02749754d@nvidia.com
[ Use Result from kernel::prelude. - Danilo ]
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions