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| author |   Ruidong Tian <tianruidong@linux.alibaba.com> | 2023-04-25 11:24:16 +0800 |
|---|---|---|
| committer |   Suzuki K Poulose <suzuki.poulose@arm.com> | 2023-05-11 11:18:21 +0100 |
| commit | 04ac7f98b92181179ea84439642493f3826d04a2 (patch) | |
| tree | 7a0264e1479933a5f6b8b3385ccf304855219e60 /scripts/generate_rust_analyzer.py | |
| parent | coresight: Fix signedness bug in tmc_etr_buf_insert_barrier_packet() (diff) | |
| download | wireguard-linux-04ac7f98b92181179ea84439642493f3826d04a2.tar.xz wireguard-linux-04ac7f98b92181179ea84439642493f3826d04a2.zip | |
coresight: perf: Release Coresight path when alloc trace id failed
Error handler for etm_setup_aux can not release coresight path because
cpu mask was cleared when coresight_trace_id_get_cpu_id failed.
Call coresight_release_path function explicitly when alloc trace id filed.
Fixes: 4ff1fdb4125c4 ("coresight: perf: traceid: Add perf ID allocation and notifiers")
Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230425032416.125542-1-tianruidong@linux.alibaba.com
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions