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| author |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2022-09-02 16:02:19 +0530 |
|---|---|---|
| committer |   Rodrigo Vivi <rodrigo.vivi@intel.com> | 2022-09-12 09:56:47 -0400 |
| commit | 0785691f5711a8f210bb15a5177c2999ebd3702e (patch) | |
| tree | 7e6e7139c5b04cc946b6f139eb097470ddce260b /scripts/generate_rust_analyzer.py | |
| parent | Linux 6.0-rc5 (diff) | |
| download | wireguard-linux-0785691f5711a8f210bb15a5177c2999ebd3702e.tar.xz wireguard-linux-0785691f5711a8f210bb15a5177c2999ebd3702e.zip | |
drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSC
Currently, pic_height of vdsc_cfg structure is being used to calculate
slice_height, before it is set for DP.
So taking out the lines to set pic_height from the helper
intel_dp_dsc_compute_params() to individual encoders, and setting
pic_height, before it is used to calculate slice_height for DP.
Fixes: 5a6d866f8e1b ("drm/i915: Get slice height before computing rc params")
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220902103219.1168781-1-ankit.k.nautiyal@intel.com
(cherry picked from commit e72df53dcb01ec58e0410da353551adf94c8d0f1)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions