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| author |   Miquel Raynal <miquel.raynal@bootlin.com> | 2024-12-24 18:06:02 +0100 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2025-01-09 20:16:38 +0000 |
| commit | 30eb2e6e78225f92f04a2325c6fd77fe8f5b4aab (patch) | |
| tree | 5cc8eea3e168bf9e04ca308496719eda5da2a8a3 /scripts/generate_rust_analyzer.py | |
| parent | spi: zynq-qspi: Support per spi-mem operation frequency switches (diff) | |
| download | wireguard-linux-30eb2e6e78225f92f04a2325c6fd77fe8f5b4aab.tar.xz wireguard-linux-30eb2e6e78225f92f04a2325c6fd77fe8f5b4aab.zip | |
spi: zynqmp-gqspi: Support per spi-mem operation frequency switches
Every ->exec_op() call correctly configures the spi bus speed to the
maximum allowed frequency for the memory using the constant spi default
parameter. Since we can now have per-operation constraints, let's use
the value that comes from the spi-mem operation structure instead. In
case there is no specific limitation for this operation, the default spi
device value will be given anyway.
The per-operation frequency capability is thus advertised to the spi-mem
core.
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-17-ad218dbc406f@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions