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| author |   Srinivas Neeli <srinivas.neeli@xilinx.com> | 2022-07-21 13:09:09 +0530 |
|---|---|---|
| committer |   Bartosz Golaszewski <brgl@bgdev.pl> | 2022-07-22 09:17:03 +0200 |
| commit | 32c094a09d5829ad9b02cdf667569aefa8de0ea6 (patch) | |
| tree | 63f4afcc754bfbdfaddc64231d2d678526fd0bb7 /scripts/generate_rust_analyzer.py | |
| parent | selftests: gpio: fix include path to kernel headers for out of tree builds (diff) | |
| download | wireguard-linux-32c094a09d5829ad9b02cdf667569aefa8de0ea6.tar.xz wireguard-linux-32c094a09d5829ad9b02cdf667569aefa8de0ea6.zip | |
gpio: gpio-xilinx: Fix integer overflow
Current implementation is not able to configure more than 32 pins
due to incorrect data type. So type casting with unsigned long
to avoid it.
Fixes: 02b3f84d9080 ("xilinx: Switch to use bitmap APIs")
Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions