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| author |   Robert Hodaszi <robert.hodaszi@digi.com> | 2024-12-11 15:47:41 +0100 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2024-12-12 07:10:27 -0800 |
| commit | 36ff681d2283410742489ce77e7b01419eccf58c (patch) | |
| tree | 2cef3cb5ae520536f292880208072c484c354476 /scripts/generate_rust_analyzer.py | |
| parent | net: dsa: microchip: KSZ9896 register regmap alignment to 32 bit boundaries (diff) | |
| download | wireguard-linux-36ff681d2283410742489ce77e7b01419eccf58c.tar.xz wireguard-linux-36ff681d2283410742489ce77e7b01419eccf58c.zip | |
net: dsa: tag_ocelot_8021q: fix broken reception
The blamed commit changed the dsa_8021q_rcv() calling convention to
accept pre-populated source_port and switch_id arguments. If those are
not available, as in the case of tag_ocelot_8021q, the arguments must be
pre-initialized with -1.
Due to the bug of passing uninitialized arguments in tag_ocelot_8021q,
dsa_8021q_rcv() does not detect that it needs to populate the
source_port and switch_id, and this makes dsa_conduit_find_user() fail,
which leads to packet loss on reception.
Fixes: dcfe7673787b ("net: dsa: tag_sja1105: absorb logic for not overwriting precise info into dsa_8021q_rcv()")
Signed-off-by: Robert Hodaszi <robert.hodaszi@digi.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://patch.msgid.link/20241211144741.1415758-1-robert.hodaszi@digi.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions