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| author |   Chen Wang <unicorn_wang@outlook.com> | 2023-11-24 14:15:16 +0800 |
|---|---|---|
| committer | Chen Wang <unicorn_wang@outlook.com> | 2024-06-14 14:49:40 +0800 |
| commit | 48cf7e01386e7e35ea12255bc401bdd484c34e7d (patch) | |
| tree | 1e97f5ba442d4bb111486b33868403b343f3bce4 /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: clock: sophgo: add clkgen for SG2042 (diff) | |
| download | wireguard-linux-48cf7e01386e7e35ea12255bc401bdd484c34e7d.tar.xz wireguard-linux-48cf7e01386e7e35ea12255bc401bdd484c34e7d.zip | |
clk: sophgo: Add SG2042 clock driver
Add a driver for the SOPHGO SG2042 clocks.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions