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| author |   Nikita Yushchenko <nikita.yoush@cogentembedded.com> | 2023-03-28 09:39:02 +0600 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2023-03-30 16:44:04 +0200 |
| commit | 5e96c2e0e88d3617477313b071cf199bfc29d794 (patch) | |
| tree | 898544b0ad9623c78afcc1fae863e2bbd556d78c /scripts/generate_rust_analyzer.py | |
| parent | clk: renesas: Convert to platform remove callback returning void (diff) | |
| download | wireguard-linux-5e96c2e0e88d3617477313b071cf199bfc29d794.tar.xz wireguard-linux-5e96c2e0e88d3617477313b071cf199bfc29d794.zip | |
clk: renesas: r8a77980: Add I2C5 clock
The MSSR clock definition for I2C5 was missing. Add it.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230328033902.830269-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions