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| author |   Liu Ying <victor.liu@nxp.com> | 2024-11-04 11:27:59 +0800 |
|---|---|---|
| committer |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-11-05 13:26:42 +0200 |
| commit | 606410292f54ef08632bdfd5c58974cf4ebc3cc9 (patch) | |
| tree | b098b0431fb3b247384aec8032ed4dd66daef3ac /scripts/generate_rust_analyzer.py | |
| parent | drm: of: Get MEDIA_BUS_FMT_RGB101010_1X7X5_{JEIDA, SPWG} LVDS data mappings (diff) | |
| download | wireguard-linux-606410292f54ef08632bdfd5c58974cf4ebc3cc9.tar.xz wireguard-linux-606410292f54ef08632bdfd5c58974cf4ebc3cc9.zip | |
drm: of: Add drm_of_lvds_get_dual_link_pixel_order_sink()
drm_of_lvds_get_dual_link_pixel_order() gets LVDS dual-link source pixel
order. Similar to it, add it's counterpart function
drm_of_lvds_get_dual_link_pixel_order_sink() to get LVDS dual-link sink
pixel order.
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20241104032806.611890-7-victor.liu@nxp.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions