diff options
| author |   José Expósito <jose.exposito89@gmail.com> | 2022-08-15 16:27:06 +0200 |
|---|---|---|
| committer |   Jiri Kosina <jkosina@suse.cz> | 2022-08-25 10:25:24 +0200 |
| commit | 609174edeb758d1e2d713e7ab4e09ea8d45aa4f7 (patch) | |
| tree | 36220cca29c96b3fb45a8842ecd22b3b05f0e995 /scripts/generate_rust_analyzer.py | |
| parent | HID: uclogic: Add missing suffix for digitalizers (diff) | |
| download | wireguard-linux-609174edeb758d1e2d713e7ab4e09ea8d45aa4f7.tar.xz wireguard-linux-609174edeb758d1e2d713e7ab4e09ea8d45aa4f7.zip | |
HID: uclogic: Fix warning in uclogic_rdesc_template_apply
Building with Sparse enabled prints this warning:
warning: incorrect type in assignment (different base types)
expected signed int x
got restricted __le32 [usertype]
Cast the return value of cpu_to_le32() to fix the warning.
Fixes: 08177f4 ("HID: uclogic: merge hid-huion driver in hid-uclogic")
Signed-off-by: José Expósito <jose.exposito89@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions