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| author |   Celeste Liu <coelacanthushex@gmail.com> | 2024-06-27 22:23:39 +0800 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2024-08-14 13:12:22 -0700 |
| commit | 61119394631f219e23ce98bcc3eb993a64a8ea64 (patch) | |
| tree | b0b47a1e641edcb5eff2b050813872501dc5b8c9 /scripts/generate_rust_analyzer.py | |
| parent | riscv: Re-introduce global icache flush in patch_text_XXX() (diff) | |
| download | wireguard-linux-61119394631f219e23ce98bcc3eb993a64a8ea64.tar.xz wireguard-linux-61119394631f219e23ce98bcc3eb993a64a8ea64.zip | |
riscv: entry: always initialize regs->a0 to -ENOSYS
Otherwise when the tracer changes syscall number to -1, the kernel fails
to initialize a0 with -ENOSYS and subsequently fails to return the error
code of the failed syscall to userspace. For example, it will break
strace syscall tampering.
Fixes: 52449c17bdd1 ("riscv: entry: set a0 = -ENOSYS only when syscall != -1")
Reported-by: "Dmitry V. Levin" <ldv@strace.io>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Cc: stable@vger.kernel.org
Signed-off-by: Celeste Liu <CoelacanthusHex@gmail.com>
Link: https://lore.kernel.org/r/20240627142338.5114-2-CoelacanthusHex@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions