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| author |   Rafal Ostrowski <rostrows@amd.com> | 2024-12-17 15:50:10 +0100 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2025-01-10 12:00:34 -0500 |
| commit | 63ab80d9ac0adae2066b140ec30481ba4648140d (patch) | |
| tree | f4c89ac4492ed63af3f29d74cd170c67f29ef9e2 /scripts/generate_rust_analyzer.py | |
| parent | drm/amd/display: Update chip_cap defines and usage (diff) | |
| download | wireguard-linux-63ab80d9ac0adae2066b140ec30481ba4648140d.tar.xz wireguard-linux-63ab80d9ac0adae2066b140ec30481ba4648140d.zip | |
drm/amd/display: DML2.1 Post-Si Cleanup
[Why]
There are a few cleanup and refactoring tasks that need to be done
with the DML2.1 wrapper and DC interface to remove dependencies on
legacy structures and N-1 prototypes.
[How]
Implemented pipe_ctx->global_sync.
Implemented new functions to use pipe_ctx->hubp_regs and
pipe_ctx->global_sync:
- hubp_setup2
- hubp_setup_interdependent2
- Several other new functions for DCN 4.01 to support newer structures
Removed dml21_update_pipe_ctx_dchub_regs
Removed dml21_extract_legacy_watermark_set
Removed dml21_populate_pipe_ctx_dlg_param
Removed outdated dcn references in DML2.1 wrapper.
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Rafal Ostrowski <rostrows@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions