diff options
| author |   Conor Dooley <conor.dooley@microchip.com> | 2022-02-14 13:58:36 +0000 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2022-03-09 21:46:39 -0800 |
| commit | 6546f920868e13ef2fe027e791dcdca49483cb6d (patch) | |
| tree | 748f9203b619d85f9120046f04c53029ec65f116 /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: pwm: add microchip corepwm binding (diff) | |
| download | wireguard-linux-6546f920868e13ef2fe027e791dcdca49483cb6d.tar.xz wireguard-linux-6546f920868e13ef2fe027e791dcdca49483cb6d.zip | |
riscv: dts: microchip: use clk defines for icicle kit
Update the Microchip Icicle kit device tree by replacing clock
related magic numbers with their defined counterparts.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions