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author | 2024-09-13 19:11:37 +0000 | |
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committer | 2024-10-09 16:38:56 -0700 | |
commit | 698a3e3c5ee6b2f91f3813a36a3b2f9ac0ec981b (patch) | |
tree | b3f5ff668394df00fd1b45968d45bc0d7b8d7b24 /scripts/generate_rust_analyzer.py | |
parent | clk: clocking-wizard: move clock registration to separate function (diff) | |
download | wireguard-linux-698a3e3c5ee6b2f91f3813a36a3b2f9ac0ec981b.tar.xz wireguard-linux-698a3e3c5ee6b2f91f3813a36a3b2f9ac0ec981b.zip |
dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled
Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Add a devicetree boolean property to
describe whether the hardware supports this feature or not.
Since dynamic reconfiguration support was previously assumed enabled,
introduce a property to indicate the inverse, in order to maintain
devicetree backwards compatibility. Hence, this new xlnx,static-config
property should be specified when dynamic reconfiguration support is
disabled in the IP core configuration.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-6-hpausten@protonmail.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions