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| author |   Vaishnav Achath <vaishnav.a@ti.com> | 2023-05-05 20:09:28 +0530 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2023-05-16 23:25:52 +0530 |
| commit | 6de80a0cc7d24292ed83d1696f61ebfee2b854f1 (patch) | |
| tree | b0408f896a699166426e95152650a131b59c972e /scripts/generate_rust_analyzer.py | |
| parent | dmaengine: ti: k3-psil-j721s2: Add PSI-L thread map for main CPSW2G (diff) | |
| download | wireguard-linux-6de80a0cc7d24292ed83d1696f61ebfee2b854f1.tar.xz wireguard-linux-6de80a0cc7d24292ed83d1696f61ebfee2b854f1.zip | |
dt-bindings: dma: ti: Add J721S2 BCDMA
Add bindings for J721S2 BCDMA instance dedicated for Camera
Serial Interface. Unlike AM62A CSI BCDMA, this instance has RX
and TX channels but lacks block copy channels.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230505143929.28131-2-vaishnav.a@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions