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| author |   Huacai Chen <chenhuacai@loongson.cn> | 2022-08-11 21:06:14 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2022-08-11 21:06:14 +0800 |
| commit | 6de9eb21cd36151281c7f3e72fc9df18f5c6c083 (patch) | |
| tree | 1cfae0e398018fb802c9f9d5dca22b30b175e2c2 /scripts/generate_rust_analyzer.py | |
| parent | Linux 5.19 (diff) | |
| parent | irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch (diff) | |
| parent | PCI: loongson: Work around LS7A incorrect Interrupt Pin registers (diff) | |
| parent | PCI: Stub __pci_ioport_map() for arches that don't support it at all (diff) | |
| download | wireguard-linux-6de9eb21cd36151281c7f3e72fc9df18f5c6c083.tar.xz wireguard-linux-6de9eb21cd36151281c7f3e72fc9df18f5c6c083.zip | |
Merge 'irq/loongarch', 'pci/ctrl/loongson' and 'pci/header-cleanup-immutable'
LoongArch architecture changes for 5.20 depend on the irqchip and pci
changes to work, so merge them to create a base.