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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-12-03 17:25:05 +0100 |
|---|---|---|
| committer |   Alexandre Belloni <alexandre.belloni@bootlin.com> | 2025-01-09 18:14:30 +0100 |
| commit | 7158c61afdcff436d087a093b45f599bb8805434 (patch) | |
| tree | 6b6c7ced30f06d0485248b7033d1e2322c6f4772 /scripts/generate_rust_analyzer.py | |
| parent | Linux 6.13-rc1 (diff) | |
| download | wireguard-linux-7158c61afdcff436d087a093b45f599bb8805434.tar.xz wireguard-linux-7158c61afdcff436d087a093b45f599bb8805434.zip | |
rtc: RTC_DRV_SPEAR should not default to y when compile-testing
Merely enabling compile-testing should not enable additional
functionality.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/7b8eefe3b0150101ba01c3ea55e45aa3134059ba.1733243007.git.geert+renesas@glider.be
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions