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| author |   Dmitry Osipenko <digetx@gmail.com> | 2021-12-01 02:23:39 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2021-12-16 14:03:38 +0100 |
| commit | 81c4c86c66650f61c6d7a712737d43a3e4d072bf (patch) | |
| tree | 2589cd30c173c8c7cc308e6c11e3d8870fdefb2a /scripts/generate_rust_analyzer.py | |
| parent | soc/tegra: pmc: Rename 3d power domains (diff) | |
| download | wireguard-linux-81c4c86c66650f61c6d7a712737d43a3e4d072bf.tar.xz wireguard-linux-81c4c86c66650f61c6d7a712737d43a3e4d072bf.zip | |
soc/tegra: pmc: Rename core power domain
CORE power domain uses name of device-tree node, which is inconsistent with
the names of PMC domains. Set the name to "core" to make it consistent.
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions