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| author |   Conor Dooley <conor.dooley@microchip.com> | 2024-07-17 14:29:24 +0100 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2024-07-22 10:57:47 -0700 |
| commit | 82b461680651ac452fa773f271000ddbc4e4db14 (patch) | |
| tree | 9d007626d3fe6b49ab2b6399611567e589629859 /scripts/generate_rust_analyzer.py | |
| parent | RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically (diff) | |
| download | wireguard-linux-82b461680651ac452fa773f271000ddbc4e4db14.tar.xz wireguard-linux-82b461680651ac452fa773f271000ddbc4e4db14.zip | |
RISC-V: run savedefconfig for defconfig
It's been a while since this was run, and there's a few things that have
changed. Firstly, almost all of the Renesas stuff vanishes because the
config for the RZ/Five is gated behind NONPORTABLE. Several options
(like CONFIG_PM) are removed as they are the default values.
To retain DEFVFREQ_THERMAL and BLK_DEV_THROTTLING, add PM_DEVFREQ and
BLK_CGROUP respectively.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240717-shrubs-concise-51600886babf@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions