diff options
| author |   Michael Walle <michael@walle.cc> | 2022-04-29 12:01:53 +0200 |
|---|---|---|
| committer |   Pratyush Yadav <p.yadav@ti.com> | 2022-05-02 14:42:00 +0530 |
| commit | 94f697c5384bd7f9632acca483ba1ef9dd99ea97 (patch) | |
| tree | 3d151571aa93bdcea17e7c47810bc05ae412e613 /scripts/generate_rust_analyzer.py | |
| parent | mtd: spi-nor: amend the rdsr dummy cycles documentation (diff) | |
| download | wireguard-linux-94f697c5384bd7f9632acca483ba1ef9dd99ea97.tar.xz wireguard-linux-94f697c5384bd7f9632acca483ba1ef9dd99ea97.zip | |
mtd: spi-nor: move spi_nor_write_ear() to winbond module
The "Extended Address Register" is winbond specific. If the flash is
larger than 16MiB and is used in 3 byte address mode, it is used to set
the remaining address bits. Move the write_ear() function, the opcode
macros and the spimem op template into the winbond module and rename
them accordingly.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220429100153.2338501-1-michael@walle.cc
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions