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| author |   Mark Brown <broonie@kernel.org> | 2022-05-10 17:12:02 +0100 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2022-05-16 19:50:20 +0100 |
| commit | 9e2c0819ac853d94c927d5d2f59e2ca2b48500b4 (patch) | |
| tree | 7b94899e8eb2f38e22a923cd4ebdfaffba2a1b06 /scripts/generate_rust_analyzer.py | |
| parent | arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h (diff) | |
| download | wireguard-linux-9e2c0819ac853d94c927d5d2f59e2ca2b48500b4.tar.xz wireguard-linux-9e2c0819ac853d94c927d5d2f59e2ca2b48500b4.zip | |
arm64/sysreg: Support generation of RAZ fields
Add a statement for RAZ bitfields to the automatic register generation
script. Nothing is emitted to the header for these fields.
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220510161208.631259-7-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions