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| author |   Neil Armstrong <neil.armstrong@linaro.org> | 2024-12-04 11:34:50 +0100 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2024-12-25 01:17:33 +0530 |
| commit | af1bc0ebe743d4c72f05a95efcc1c66043332be0 (patch) | |
| tree | 372624e392ba74e6f1bce52d87b90b8586e36071 /scripts/generate_rust_analyzer.py | |
| parent | phy: rockchip: phy-rockchip-typec: Fix Copyright description (diff) | |
| download | wireguard-linux-af1bc0ebe743d4c72f05a95efcc1c66043332be0.tar.xz wireguard-linux-af1bc0ebe743d4c72f05a95efcc1c66043332be0.zip | |
dt-bindings: phy: qcom,qmp-pcie: document the SM8350 two lanes PCIe PHY
Document the two lanes PCIe PHY found on SM8350 SoCs along the
already documented single lane PCIe PHY.
This fixes:
/soc@0/phy@1c0e000: failed to match any schema with compatible: ['qcom,sm8350-qmp-gen3x2-pcie-phy']
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241204-topic-misc-sm8350-pcie-bindings-fix-v1-1-e8eaff1699d7@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions