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| author |   Garmin.Chang <Garmin.Chang@mediatek.com> | 2023-03-31 20:36:10 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2023-03-31 11:51:21 -0700 |
| commit | b281039a7b4939c62196fd2c690a9a13a093ed2e (patch) | |
| tree | 17661854b11e1e07f7c33492c2c372cbfdc2e4db /scripts/generate_rust_analyzer.py | |
| parent | clk: mediatek: Add MT8188 ccusys clock support (diff) | |
| download | wireguard-linux-b281039a7b4939c62196fd2c690a9a13a093ed2e.tar.xz wireguard-linux-b281039a7b4939c62196fd2c690a9a13a093ed2e.zip | |
clk: mediatek: Add MT8188 imgsys clock support
Add MT8188 imgsys clock controllers which provide clock gate
control for image IP blocks.
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230331123621.16167-9-Garmin.Chang@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions