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author | 2023-05-19 11:04:20 -0500 | |
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committer | 2023-05-23 12:52:05 +0200 | |
commit | bbb320bfe2c3e9740fe89cfa0a7089b4e8bfc4ff (patch) | |
tree | 309d0502ac58ca82d15ad297fdc1515cfcaeb9e5 /scripts/generate_rust_analyzer.py | |
parent | platform/mellanox: mlxbf-pmc: fix sscanf() error checking (diff) | |
download | wireguard-linux-bbb320bfe2c3e9740fe89cfa0a7089b4e8bfc4ff.tar.xz wireguard-linux-bbb320bfe2c3e9740fe89cfa0a7089b4e8bfc4ff.zip |
platform/x86: ISST: Remove 8 socket limit
Stop restricting the PCI search to a range of PCI domains fed to
pci_get_domain_bus_and_slot(). Instead, use for_each_pci_dev() and
look at all PCI domains in one pass.
On systems with more than 8 sockets, this avoids error messages like
"Information: Invalid level, Can't get TDP control information at
specified levels on cpu 480" from the intel speed select utility.
Fixes: aa2ddd242572 ("platform/x86: ISST: Use numa node id for cpu pci dev mapping")
Signed-off-by: Steve Wahl <steve.wahl@hpe.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230519160420.2588475-1-steve.wahl@hpe.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions