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| author |   Moshe Shemesh <moshe@nvidia.com> | 2023-04-28 13:48:13 +0300 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2023-05-31 20:08:37 -0700 |
| commit | bbfa4b58997e3d38ba629c9f6fc0bd1c163aaf43 (patch) | |
| tree | 1fcf0389660c0250190ca0a670c1736f40c8502a /scripts/generate_rust_analyzer.py | |
| parent | net/mlx5e: Fix error handling in mlx5e_refresh_tirs (diff) | |
| download | wireguard-linux-bbfa4b58997e3d38ba629c9f6fc0bd1c163aaf43.tar.xz wireguard-linux-bbfa4b58997e3d38ba629c9f6fc0bd1c163aaf43.zip | |
net/mlx5: Read embedded cpu after init bit cleared
During driver load it reads embedded_cpu bit from initialization
segment, but the initialization segment is readable only after
initialization bit is cleared.
Move the call to mlx5_read_embedded_cpu() right after initialization bit
cleared.
Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Fixes: 591905ba9679 ("net/mlx5: Introduce Mellanox SmartNIC and modify page management logic")
Reviewed-by: Shay Drory <shayd@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions