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| author |   Dave Airlie <airlied@redhat.com> | 2022-10-12 14:20:59 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2022-10-12 14:21:00 +1000 |
| commit | d6fe5887ca891f5a7a3998bcbeccd6ec2e215132 (patch) | |
| tree | 9ee50b208920823c352e479b64bb83a9751f6f85 /scripts/generate_rust_analyzer.py | |
| parent | Revert "drm/sched: Use parent fence instead of finished" (diff) | |
| parent | drm/i915: Reject excessive dotclocks early (diff) | |
| download | wireguard-linux-d6fe5887ca891f5a7a3998bcbeccd6ec2e215132.tar.xz wireguard-linux-d6fe5887ca891f5a7a3998bcbeccd6ec2e215132.zip | |
Merge tag 'drm-intel-next-fixes-2022-10-06-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- Round to closest in g4x+ HDMI clock readout (Ville Syrjälä)
- Update MOCS table for EHL (Tejas Upadhyay)
- Fix PSR_IMR/IIR field handling (Jouni Högander)
- Fix watermark calculations for gen12+ RC CCS modifier (Ville Syrjälä)
- Fix watermark calculations for gen12+ MC CCS modifier (Ville Syrjälä)
- Fix watermark calculations for gen12+ CCS+CC modifier (Ville Syrjälä)
- Fix watermark calculations for DG2 CCS modifiers (Ville Syrjälä)
- Fix watermark calculations for DG2 CCS+CC modifier (Ville Syrjälä)
- Reject excessive dotclocks early (Ville Syrjälä)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Yz6rkXI9HKFUvtWK@tursulin-desk
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions