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| author |   Luo Yifan <luoyifan@cmss.chinamobile.com> | 2024-11-12 17:09:24 +0800 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2024-11-20 14:20:51 -0600 |
| commit | d9db393f2b9ed674f965dd823c1692b41bad7bfb (patch) | |
| tree | fd68b274080f87fabb7ce2b488c2c86f5daa05a9 /scripts/generate_rust_analyzer.py | |
| parent | PCI: Simplify pci_create_slot() logic (diff) | |
| download | wireguard-linux-d9db393f2b9ed674f965dd823c1692b41bad7bfb.tar.xz wireguard-linux-d9db393f2b9ed674f965dd823c1692b41bad7bfb.zip | |
tools: PCI: Fix incorrect printf format specifiers
Fix several incorrect printf format specifiers that misused signed and
unsigned versions.
Link: https://lore.kernel.org/r/20241112090924.287056-1-luoyifan@cmss.chinamobile.com
Signed-off-by: Luo Yifan <luoyifan@cmss.chinamobile.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions