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author | 2024-06-12 16:38:25 +0530 | |
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committer | 2024-06-23 17:14:05 -0500 | |
commit | dff68b2f74547617dbb75d0d12f404877ec8f8ce (patch) | |
tree | 87f471c04e45a76235182fcedc4adda624eabae7 /scripts/generate_rust_analyzer.py | |
parent | clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON flags (diff) | |
download | wireguard-linux-dff68b2f74547617dbb75d0d12f404877ec8f8ce.tar.xz wireguard-linux-dff68b2f74547617dbb75d0d12f404877ec8f8ce.zip |
clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable
The RCG's clk src has to be parked at XO while disabling as per the
HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
clk_branch2_aon_ops to keep the clock always ON.
Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-5-adcc756a23df@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions