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| author |   Jerome Brunet <jbrunet@baylibre.com> | 2024-06-10 12:18:15 +0200 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2024-06-10 12:18:15 +0200 |
| commit | f34da56094273fb31c98e7ed89a64e3b8036962d (patch) | |
| tree | bb9f77a139891cd12cfebf94b6df0fffc2c5a827 /scripts/generate_rust_analyzer.py | |
| parent | clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL (diff) | |
| parent | dt-bindings: clock: meson: a1: peripherals: support sys_pll input (diff) | |
| download | wireguard-linux-f34da56094273fb31c98e7ed89a64e3b8036962d.tar.xz wireguard-linux-f34da56094273fb31c98e7ed89a64e3b8036962d.zip | |
Merge branch 'v6.11/bindings' into v6.11/drivers
* v6.11/bindings:
dt-bindings: clock: meson: a1: peripherals: support sys_pll input
dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions