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| author |   Garmin.Chang <Garmin.Chang@mediatek.com> | 2023-03-31 20:36:19 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2023-03-31 11:51:22 -0700 |
| commit | f42b9e9a43e300ef94c3dc0381cc60f50e46e1fe (patch) | |
| tree | dace7967711fa8428eb330c07c48cbee3d5b7bd3 /scripts/generate_rust_analyzer.py | |
| parent | clk: mediatek: Add MT8188 vppsys1 clock support (diff) | |
| download | wireguard-linux-f42b9e9a43e300ef94c3dc0381cc60f50e46e1fe.tar.xz wireguard-linux-f42b9e9a43e300ef94c3dc0381cc60f50e46e1fe.zip | |
clk: mediatek: Add MT8188 wpesys clock support
Add MT8188 wpesys clock controllers which provide clock gate
control in Wrapping Engine.
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230331123621.16167-18-Garmin.Chang@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions