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| author |   Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2024-10-28 21:36:43 +0100 |
|---|---|---|
| committer |   Daniel Lezcano <daniel.lezcano@linaro.org> | 2024-11-13 13:49:33 +0100 |
| commit | cd5375610baadd3a0842a9e83ca502684f938be8 (patch) | |
| tree | 4dd2454093e0cf0550e9b01e5da8ce123d2567a9 /scripts/lib/kdoc/kdoc_re.py | |
| parent | clocksource/drivers/mips-gic-timer: Always use cluster 0 counter as clocksource (diff) | |
| download | wireguard-linux-cd5375610baadd3a0842a9e83ca502684f938be8.tar.xz wireguard-linux-cd5375610baadd3a0842a9e83ca502684f938be8.zip | |
clocksource/drivers/ralink: Add Ralink System Tick Counter driver
System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This
driver has been in 'arch/mips/ralink' directory since the beggining of
Ralink architecture support. However, it can be moved into a more proper
place in 'drivers/clocksource'. Hence add it here adding also support for
compile test targets and reducing LOC in architecture code folder.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20241028203643.191268-2-sergio.paracuellos@gmail.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_re.py')
0 files changed, 0 insertions, 0 deletions