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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2024-09-11 21:44:22 +0200
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2024-09-11 21:44:22 +0200
commit45de40574febfba3e07dd72f680b1d044797e008 (patch)
tree2833da9bf910c7460bbdbbeb6f278ae1db4941b2 /scripts/module-common.c
parentMerge branch 'acpica' (diff)
parentirqchip/sifive-plic: Add ACPI support (diff)
downloadwireguard-linux-45de40574febfba3e07dd72f680b1d044797e008.tar.xz
wireguard-linux-45de40574febfba3e07dd72f680b1d044797e008.zip
Merge branch 'acpi-riscv'
Merge ACPI and irqchip updates related to external interrupt controller support on RISC-V: - Add ACPI device enumeration support for interrupt controller probing including taking dependencies into account (Sunil V L). - Implement ACPI-based interrupt controller probing on RISC-V (Sunil V L). - Add ACPI support for AIA in riscv-intc and add ACPI support to riscv-imsic, riscv-aplic, and sifive-plic (Sunil V L). * acpi-riscv: irqchip/sifive-plic: Add ACPI support irqchip/riscv-aplic: Add ACPI support irqchip/riscv-imsic: Add ACPI support irqchip/riscv-imsic-state: Create separate function for DT irqchip/riscv-intc: Add ACPI support for AIA ACPI: RISC-V: Implement function to add implicit dependencies ACPI: RISC-V: Initialize GSI mapping structures ACPI: RISC-V: Implement function to reorder irqchip probe entries ACPI: RISC-V: Implement PCI related functionality ACPI: pci_link: Clear the dependencies after probe ACPI: bus: Add RINTC IRQ model for RISC-V ACPI: scan: Define weak function to populate dependencies ACPI: scan: Add RISC-V interrupt controllers to honor list ACPI: scan: Refactor dependency creation ACPI: bus: Add acpi_riscv_init() function ACPI: scan: Add a weak arch_sort_irqchip_probe() to order the IRQCHIP probe arm64: PCI: Migrate ACPI related functions to pci-acpi.c
Diffstat (limited to 'scripts/module-common.c')
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